Modular buffering circuitry for multi-channel transceiver...

Details Modular buffering circuitry for multi-channel transceiver... Modular buffering circuitry for multi-channel transceiver...

2007-12-04

2007-12-04

Le, Don (Department: 2819)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

C326S041000

Reexamination Certificate

active

11288496

ABSTRACT:
Circuitry for distributing signals such as reference clock signals among blocks of transceiver circuitry on an integrated circuit such as a field programmable gate array (“FPGA”) employs bidirectional buffers rather than unidirectional buffers. This allows all buffers to have the same construction regardless of physical location, which facilitates construction of the circuitry using identical or substantially identical modules. The same approach may be used for distributing other types of signals among the transceiver blocks. For example, this approach may be used for distributing calibration control signals.

REFERENCES:
patent: 6690195 (2004-02-01), Ngai et al.
patent: 7075365 (2006-07-01), Starr et al.

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