Method and structure for addressing hot carrier degradation...

Details Method and structure for addressing hot carrier degradation... Method and structure for addressing hot carrier degradation...

2007-02-20

2007-02-20

Prenty, Mark V. (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S487000

Reexamination Certificate

active

11016147

ABSTRACT:
In a method and structure for a high voltage LDMOS with reduced hot carrier degradation, the thick field oxide is eliminated and a reduced surface field achieved instead by including adjacent p+ and n+ regions in the drain well and shorting these regions to each other, or by including a p+ region in the drain well and biasing it to a positive voltage relative to the source voltage.

REFERENCES:
patent: 5898201 (1999-04-01), Hsu et al.

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