MOS capacitor with reduced parasitic capacitance

Details MOS capacitor with reduced parasitic capacitance MOS capacitor with reduced parasitic capacitance

2007-08-14

2007-08-14

Tran, Thien F (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S313000, C257S532000

Reexamination Certificate

active

10862405

ABSTRACT:
A capacitor including a first active layer capacitively coupled to a second active layer, the second active layer being capacitively coupled to a third layer, the third layer being capacitively coupled to a fourth layer, wherein an anode of the capacitor is connected to one of the first and second active layers, and a cathode of the capacitor is connected to the other one of the first and second active layers, and wherein the third layer is left floating. The fourth layer may be connected to a supply voltage, such as but not limited to, ground.

REFERENCES:
patent: 4961010 (1990-10-01), Davis
patent: 5029063 (1991-07-01), Lingstaedt et al.
patent: 5081371 (1992-01-01), Wong
patent: 5142495 (1992-08-01), Canepa
patent: 5142496 (1992-08-01), Van Buskirk
patent: 5276646 (1994-01-01), Kim et al.
patent: 5280420 (1994-01-01), Rapp
patent: 5381374 (1995-01-01), Shiraishi et al.
patent: 5534804 (1996-07-01), Woo
patent: 5553030 (1996-09-01), Tedrow et al.
patent: 5559687 (1996-09-01), Nicollini et al.
patent: 5581252 (1996-12-01), Thomas
patent: 5612642 (1997-03-01), McClintock
patent: 5636288 (1997-06-01), Bonneville et al.
patent: 5663907 (1997-09-01), Frayer et al.
patent: 5672959 (1997-09-01), Der
patent: 5675280 (1997-10-01), Nomura et al.
patent: 5708608 (1998-01-01), Park et al.
patent: 5717581 (1998-02-01), Canclini
patent: 5726946 (1998-03-01), Yamagata et al.
patent: 5760634 (1998-06-01), Fu
patent: 5808506 (1998-09-01), Tran
patent: 5815435 (1998-09-01), Van Tran
patent: 5847441 (1998-12-01), Cutter et al.
patent: 5880620 (1999-03-01), Gitlin et al.
patent: 5903031 (1999-05-01), Yamada et al.
patent: 5910924 (1999-06-01), Tanaka et al.
patent: 5946258 (1999-08-01), Evertt et al.
patent: 5963412 (1999-10-01), En
patent: 6005423 (1999-12-01), Schultz
patent: 6028324 (2000-02-01), Su et al.
patent: 6040610 (2000-03-01), Noguchi et al.
patent: 6064251 (2000-05-01), Park
patent: 6075402 (2000-06-01), Ghilardelli et al.
patent: 6081456 (2000-06-01), Dadashev
patent: 6094095 (2000-07-01), Murray et al.
patent: 6107862 (2000-08-01), Mukainakano et al.
patent: 6118207 (2000-09-01), Ormerod et al.
patent: 6130572 (2000-10-01), Ghilardelli et al.
patent: 6130574 (2000-10-01), Bloch et al.
patent: 6150800 (2000-11-01), Kinoshita et al.
patent: 6154081 (2000-11-01), Pakkala et al.
patent: 6157242 (2000-12-01), Fukul
patent: 6188211 (2001-02-01), Rincon-Mora et al.
patent: 6198342 (2001-03-01), Kawai
patent: 6208200 (2001-03-01), Arakawa
patent: 6246555 (2001-06-01), Tham
patent: 6285614 (2001-09-01), Mulatti et al.
patent: 6297974 (2001-10-01), Ganesan et al.
patent: 6339556 (2002-01-01), Watanabe
patent: 6353356 (2002-03-01), Liu
patent: 6356469 (2002-03-01), Roohparvar et al.
patent: 6359501 (2002-03-01), Lin et al.
patent: 6400209 (2002-06-01), Matsuyama et al.
patent: 6433624 (2002-08-01), Grossnickle et al.
patent: 6452438 (2002-09-01), Li
patent: 6515903 (2003-02-01), Le et al.
patent: 6577514 (2003-06-01), Shor et al.
patent: 6608526 (2003-08-01), Sauer
patent: 6614295 (2003-09-01), Tsuchi
patent: 6627555 (2003-09-01), Eitan et al.
patent: 6654296 (2003-11-01), Jang et al.
patent: 6665769 (2003-12-01), Cohen et al.
patent: 6677805 (2004-01-01), Shor et al.
patent: 2002/0140109 (2002-10-01), Keshavarzi et al.
patent: 2002/0145465 (2002-10-01), Shor et al.
patent: 2003/0076159 (2003-04-01), Shor et al.
patent: 2003/0202411 (2003-10-01), Yamada
patent: 2004/0151034 (2004-08-01), Shor et al.
patent: 0693781 (1996-01-01), None
patent: 0 843 398 (1998-05-01), None
patent: 02001118392 (2001-04-01), None
Martin, “Improved Circuits for the Realization of Switched-Capacitor Filters”, IEEE Transactions on Circuits and Systems, Apr. 1980, pp. 237-244, vol. CAS-27.
Klinke. et al., “A Very-High-Stew-Rate CMOS Operational Amplifier”, IEEE Journal of Solid-State Circuits, 1989. pp. 744-746, vol. 24.
Shor, et al. “paper WA2.04 01—Self regulated Four-Phased Charge Pump with Boosted Wells”. ISCAS 2002, 2002.
Fotouhi, “An Efficient CMOS Line Driver for 1.544-Mb/s T1 and 2 048-Mb/s E1 Applications”, IEEE Journal of Solid-State Circuits, 2003, pp. 226-236, vol. 38.

Affiliated with

Also associated with

Rating

MOS capacitor with reduced parasitic capacitance does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with MOS capacitor with reduced parasitic capacitance, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOS capacitor with reduced parasitic capacitance will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3856444