Multi-Processor data verification components for security...

Details Multi-Processor data verification components for security... Multi-Processor data verification components for security...

2007-12-25

2007-12-25

Lane, Jack (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S103000, C711S115000, C711S147000, C709S213000, C709S216000, C713S193000, C235S492000

Reexamination Certificate

active

11142309

ABSTRACT:
The aim of this invention is to improve in an optimal way the security of smart cards to prevent the fraudulent control of a cryptographic processor(s) by means of external signals that interfere with the normal development of the tasks of a processor(s). This aim is reached by a component IC of a security module comprising at least two processors CPU A, CPU B each connected to program memories ROM A, ROM B, to non-volatile programmable and erasable memories (EEPROM) EEPROM A, EEPROM B containing the data and random access memories (RAM) RAM A, RAM B that serve as temporary data storage during processing, the first processor CPU A having an interface bus toward an exterior of the component IC, characterized in that the second processor CPU B is connected to the first processor CPU A through an exchange memory DPR, the non-volatile programmable and erasable memory EEPROM A of the first processor CPU A having read-only access R for said first processor CPU A, the second processor CPU B having read and write access R/W on said non-volatile programmable and erasable memory EEPROM A of the first processor CPU A.

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