Methods and structure for selective impedance control of bus...

Details Methods and structure for selective impedance control of bus... Methods and structure for selective impedance control of bus...

2007-08-21

2007-08-21

Cho, James (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S026000, C326S031000, C710S313000, C710S314000, C710S315000

Reexamination Certificate

active

11061073

ABSTRACT:
Methods and apparatus for selectively allowing and disallowing changes to an impedance control signal applied to bus driver circuits coupling a device or system to a common, shared bus where impedance of the bus may vary over time. Well known impedance sensing circuits may be coupled to a common bus, such as a PCI bus, and may be used to generate an impedance control signal to be applied to well-known bus driver circuits, including, for example, PCI bus driver circuits, to vary the drive level of such bus driver circuits in accordance with the present electrical impedance sensed on the bus. Features and aspects hereof permit selectively allowing and disallowing changes to such impedance control signals as applied to the driver circuits based upon the present state of the bus and/or the present state of signals driven on the bus by the system embodying the features and aspects hereof.

REFERENCES:
patent: 6380758 (2002-04-01), Hsu et al.

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