Method for making a semiconductor device including a...

Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Plural fluid growth steps with intervening diverse operation

Reexamination Certificate

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C438S197000, C257SE33055

Reexamination Certificate

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11097612

ABSTRACT:
A method for making a semiconductor device may include forming a superlattice comprising a plurality of stacked groups of layers. Each group of layers of the superlattice may include a plurality of stacked base silicon monolayers defining a base silicon portion and an energy band-modifying layer thereon. The energy band-modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include forming at least one pair of oppositely-doped regions in the superlattice defining at least one semiconductor junction.

REFERENCES:
patent: 4485128 (1984-11-01), Dalal et al.
patent: 4594603 (1986-06-01), Holonyak, Jr.
patent: 4688068 (1987-08-01), Chaffin et al.
patent: 4882609 (1989-11-01), Schubert et al.
patent: 4908678 (1990-03-01), Yamazaki
patent: 4937204 (1990-06-01), Ishibashi et al.
patent: 4969031 (1990-11-01), Kobayashi et al.
patent: 5045894 (1991-09-01), Migita et al.
patent: 5055887 (1991-10-01), Yamazaki
patent: 5081513 (1992-01-01), Jackson et al.
patent: 5216262 (1993-06-01), Tsu
patent: 5357119 (1994-10-01), Wang et al.
patent: 5577061 (1996-11-01), Hasenberg et al.
patent: 5594567 (1997-01-01), Akiyama et al.
patent: 5606177 (1997-02-01), Wallace et al.
patent: 5616515 (1997-04-01), Okuno
patent: 5627386 (1997-05-01), Harvey et al.
patent: 5683934 (1997-11-01), Candelaria
patent: 5684817 (1997-11-01), Houdre et al.
patent: 5994164 (1999-11-01), Fonash et al.
patent: 6058127 (2000-05-01), Joannopoulos et al.
patent: 6255150 (2001-07-01), Wilk et al.
patent: 6274007 (2001-08-01), Smirnov et al.
patent: 6281518 (2001-08-01), Sato
patent: 6281532 (2001-08-01), Doyle et al.
patent: 6326311 (2001-12-01), Ueda et al.
patent: 6344271 (2002-02-01), Yadav et al.
patent: 6350993 (2002-02-01), Chu et al.
patent: 6376337 (2002-04-01), Wang et al.
patent: 6436784 (2002-08-01), Allam
patent: 6472685 (2002-10-01), Takagi
patent: 6498359 (2002-12-01), Schmidt et al.
patent: 6501092 (2002-12-01), Nikonov et al.
patent: 6521549 (2003-02-01), Kamath et al.
patent: 6566679 (2003-05-01), Nikonov et al.
patent: 6608327 (2003-08-01), Davis et al.
patent: 6621097 (2003-09-01), Nikonov et al.
patent: 6711191 (2004-03-01), Kozaki et al.
patent: 6748002 (2004-06-01), Shveykin
patent: 2002/0094003 (2002-07-01), Bour et al.
patent: 2003/0034529 (2003-02-01), Fitzgerald et al.
patent: 2003/0057416 (2003-03-01), Currie et al.
patent: 2003/0089899 (2003-05-01), Lieber et al.
patent: 2003/0162335 (2003-08-01), Yuki et al.
patent: 2003/0215990 (2003-11-01), Fitzgerald et al.
patent: 2004/0084781 (2004-05-01), Ahn et al.
patent: 2004/0227165 (2004-11-01), Wang et al.
patent: 0 434 068 (1991-06-01), None
patent: 0 555 722 (1993-08-01), None
patent: 0 843 361 (1998-05-01), None
patent: 2347520 (2000-09-01), None
patent: 61027681 (1986-02-01), None
patent: 61145820 (1986-07-01), None
patent: 61220339 (1986-09-01), None
patent: 62219665 (1987-09-01), None
patent: 99/63580 (1999-12-01), None
patent: 01/09957 (2001-02-01), None
patent: 02/103767 (2002-12-01), None
patent: 05/018005 (2005-02-01), None
Patent Abstracts of Japan, vol. 012, No. 080 (E-590), Mar. 12, 1988 & JP 62 219665 A (Fujitsu Ltd), Sep. 26, 1987 abstract.
Patent Abstracts of Japan, vol. 010, No. 179 (E-414), Jun 24, 1986 & JP 61 027681 A (Res Dev Corp of Japan), Feb. 7, 1986 abstract.
Luo et al.,Chemical Design of Direct-Gap Light-Emitting Silicon, published Jul. 25, 2002, The American Physical Society; vol. 89, No. 7.
Tsu,Phenomena in Silicon Nanostructure Devices, University of North Carolina at Charlotte, Sep. 6, 2000.
Ye et al.,GaAs MOSFET with Oxide Gate Dielectric Grown by Atomic Layer Deposition, Agere Systems, Mar. 2003.
Novikov et al.,Silicon-based Optoelectronics, 1999-2003, pp. 1-6.
Fan et al.,N- and P-Type SiGe/Si Superlattice Coolers, the Seventeenth Intersociety Conference on Thermomechanical Phenomena in Electronic Systems (ITherm 2000), vol. 1, pp. 304-307, Las Vegas, NV, May 2000.
Shah et al.,Experimental Analysis and Theoretical Model for Anomalously High Ideality Factors(n>2.0)in AlGaN/GaN P-N Junction Diodes, Journal of Applied Physics, vol. 94, No. 4, Aug. 15, 2003.
Ball,Striped Nanowires Shrink Electronics, news@nature.com, Feb. 7, 2002.
Fiory et al.,Light Emission from Silicon: Some Perspectives and Applications, Journal of Electronic Materials, vol. 32, No. 10, 2003.
Lecture 6: Light Emitting and Detecting Devices, MSE 6001, Semiconductor Materials Lectures, Fall 2004.
Harvard University Professor and Nanosys Co-Founder, Charlie Lieber, Raises the Stakes in the Development of Nanoscale Superlattice Structures and Nanodevices, 2004 Nanosys, Inc.
Patent abstract of Japan No. 63-93189; Seiko Epson Corp., Apr. 23, 1988.

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