Method for computer aided design of semiconductor integrated...

Details Method for computer aided design of semiconductor integrated... Method for computer aided design of semiconductor integrated...

2007-10-30

2007-10-30

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

11122221

ABSTRACT:
In transistor layout design, a plurality of distances Lfig1, Lfig2, Lfig3from a gate electrode of a transistor to the edge of a diffusion layer are displayed by multiple lines according to a variation amount of a transistor characteristic with the use of a CAD tool. A layer for defining an isolation region between adjacent transistors is extended automatically by the CAD tool. Accordingly, even in the case where the transistor characteristic varies depending on the distance from the gate electrode of the transistor to the edge of the diffusion layer, the isolation region between the adjacent transistors can be layouted and designed optimally with no measurement of the distance by designer's visual observation necessitated.

REFERENCES:
patent: 6362506 (2002-03-01), Miyai
patent: 7032194 (2006-04-01), Hsueh et al.
patent: 7155689 (2006-12-01), Pierrat et al.
patent: 2001-351985 (2001-12-01), None

Affiliated with

Also associated with

Rating

Method for computer aided design of semiconductor integrated... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for computer aided design of semiconductor integrated..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for computer aided design of semiconductor integrated... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3850221