Snapshot CMOS image sensor with high shutter rejection ratio

Details Snapshot CMOS image sensor with high shutter rejection ratio Snapshot CMOS image sensor with high shutter rejection ratio

2007-08-07

2007-08-07

Purvis, Sue A. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S213000, C257S288000, C257S290000, C257SE27133, C438S048000, C438S057000, C438S073000

Reexamination Certificate

active

11139743

ABSTRACT:
A pixel image sensor has an isolation barrier and diffusion well connected to a biasing voltage to prevent substrate charge leakage caused by photoelectrons generated in the substrate beneath a photon sensing area of the pixel image sensor from drifting to a storage node. An opaque metallic silicide layer is deposited on and a metal shield is fabricated above the storage node and storage node control transistor switches to prevent light from impinging on the storage node and storage node control transistor switches and thus preventing generation of photoelectrons at the storage node and storage node control transistor switches. A guard ring surrounds the photo sensing area, the storage node, and the storage node control transistor switches and is in contact with the biasing voltage and reduces cross-talk from photoelectrons drifting from adjacent image sensors.

REFERENCES:
patent: 6069376 (2000-05-01), Merrill
patent: 6218691 (2001-04-01), Chung et al.
patent: 6326230 (2001-12-01), Pain et al.
patent: 6403998 (2002-06-01), Inoue
patent: 6521920 (2003-02-01), Abe
patent: 6737626 (2004-05-01), Bidermann et al.
patent: 6839452 (2005-01-01), Yang et al.
patent: 6885047 (2005-04-01), Shinohara et al.
patent: 2004/0103095 (2004-05-01), Matsugu et al.
patent: 2004/0222449 (2004-11-01), Koyama
“A Snap-Shot CMOS Active Pixel Imager for Low-Noise, High-Speed Imaging,” Yang et al., Tech, Digest, Int'l Elec Devices Meetting, Dec. 1998, pp. 45-48.
“CMOS Difference Imagers with Charge Leakage Compensation and Sum Output,” Pain et al., IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensors, Jun. 2001, pp. 125-138, 2000.
“CMOS Imager with Charge-Leakage Compensated Frame Difference and Sum Output,” Pain et al., The 2001 IEEE Int'l Symp. on Circuits and Systems, May 2001, vol. 5, pp. 223-226.
“CMOS Image Sensor with Nmos-Only Global Shutter and Enhanced Responsivity,” Wang et al., IEEE Trans. on Elec. Devices, Jan. 2003, vol. 50, Issue:1, pp. 57-62.
2005 IEEE Workshop on CCD and AIS, Jun. 9-11, 2005 Karuizawa, Nagano, Japan (pp. 161-164), “Ultra High Light Shutter Rejection Ratio Snapshot Pixel Image Sensor ASIC for Pattern Recognition”, Guang Yang et al.
Actuator 2004, 9th Int'l Conf. an Now Actuators, Jun. 14-16, 2004, Breman, Germany, pp. 491-494, “Micromotor Based on Film Permanent Magnets”, P. Meneroud et al.
“Ultra High Light Shutter Rejection Ratio Snapshot Pixel Image Sensor ASIC for Pattern Recognition”, Yang & Dosluoglu, Proceeding of the 2005 IEEE Workshop on CCD and AIS, Jun. 9-11, 2005, Karuizawa, Nagano, Japan, pp.:161-164.

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