Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2007-11-20
2007-11-20
Pizarro, Marcos D. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S255000, C257S627000, C257SE27112
Reexamination Certificate
active
11047928
ABSTRACT:
A semiconductor device includes a semiconductor body having semiconductor material of a first crystal orientation. A first transistor is formed in the semiconductor material of the first crystal orientation. An insulating layer overlies portions of the semiconductor body and a semiconductor layer overlies the insulating layer. The semiconductor layer has a second crystal orientation. A second transistor is formed in the semiconductor layer having the second crystal orientation. In the preferred embodiment, the semiconductor body is (100) silicon, the first transistor is an NMOS transistor, the semiconductor layer is (110) silicon and the second transistor is a PMOS transistor.
REFERENCES:
patent: 3476991 (1969-11-01), Mize et al.
patent: 3603848 (1971-09-01), Kohoku-ku et al.
patent: 3612960 (1971-10-01), Tokyo et al.
patent: 3634737 (1972-01-01), Maeda et al.
patent: 4768076 (1988-08-01), Aoki et al.
patent: 4857986 (1989-08-01), Kinugawa
patent: 4878957 (1989-11-01), Yamaguchi et al.
patent: 5384473 (1995-01-01), Yoshikawa et al.
patent: 5593915 (1997-01-01), Ohoka
patent: 5688893 (1997-11-01), Rahman et al.
patent: 5994188 (1999-11-01), Disney
patent: 6017801 (2000-01-01), Youn
patent: 6294803 (2001-09-01), Gil
patent: 6436748 (2002-08-01), Forbes et al.
patent: 6815277 (2004-11-01), Fried et al.
patent: 6900503 (2005-05-01), Oh et al.
patent: 6902962 (2005-06-01), Yeo et al.
patent: 6967132 (2005-11-01), Gonzalez et al.
patent: 6967351 (2005-11-01), Fried et al.
patent: 6972478 (2005-12-01), Waite et al.
patent: 2004/0070045 (2004-04-01), Suguro et al.
patent: 2004/0082165 (2004-04-01), Kuroi et al.
patent: 2004/0121507 (2004-06-01), Bude et al.
patent: 2004/0178452 (2004-09-01), Miyasaka
patent: 2004/0195646 (2004-10-01), Yeo et al.
patent: 2004/0253773 (2004-12-01), Kang
patent: 2004/0256700 (2004-12-01), Doris et al.
patent: 0 852 416 (1998-07-01), None
Yang, M., et al., “High Performance CMOS Fabricated on Hybrid Substrate With Different Crystal Orientations,” 2003 IEDM pp. 18.7.1-18.7.4.
Sheikh F., et al., “The Impact of Device Orientation on Width-Quantized FinFET Circuits,” EE 241 Spring 2004, pp. 1-6.
Yang, J., et al., “Edge Transistor Elimination in Oxide Trench IsolatedN-Channel Metal-Oxide-Semiconductor Field Effect Transistors,” 2001 American Vacuum Society, Feb. 5, 2001, pp. 327-332.
Gutmann Alois
Shum Danny Pak-Chum
Sung Chun-Yung
Yan Jiang
Infineon - Technologies AG
Pizarro Marcos D.
Slater & Matsil L.L.P.
LandOfFree
Semiconductor method and device with mixed orientation... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor method and device with mixed orientation..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor method and device with mixed orientation... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3845440