Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-06-19
2007-06-19
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S637000, C438S638000, C438S618000, C438S633000, C438S636000, C438S687000, C438S710000, C438S725000, C438S706000, C257S758000, C257SE21579, C257SE21575, C257SE21577, C257SE21585, C257SE21218
Reexamination Certificate
active
11024661
ABSTRACT:
A method for forming a dual damascene interconnection in a semiconductor device, which is capable of preventing a lower metal film from being corroded. The method includes the steps of forming an etch stop film and an intermetal insulating film sequentially on a lower metal film to be interconnected, forming a via hole for exposing a portion of a surface of the etch stop film through the intermetal insulating film, and forming a trench having a width wider than that of the via hole on the intermetal insulating film. The method also includes the steps of exposing the lower metal film by removing the etch stop film by performing an etching process using an etching equipment of a dual plasma source, performing a nitrogen passivation process for the exposed lower metal film, and forming a barrier metal film and an upper metal film sequentially within the trench and the via hole.
REFERENCES:
patent: 6323121 (2001-11-01), Liu et al.
patent: 2002/0182880 (2002-12-01), Zhu et al.
patent: 2004/0219783 (2004-11-01), Ahn et al.
patent: 2005/0059233 (2005-03-01), Wang et al.
patent: 2005/0106866 (2005-05-01), Omura et al.
Ahmadi Mohsen
Dongbu Electronics Co. Ltd.
Lebentritt Michael
Lowe Hauptman & Berner LLP
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