Facilitating error detection for content addressable memory

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Details

C714S048000, C714S800000, C714S807000, C365S049130

Reexamination Certificate

active

10663612

ABSTRACT:
One embodiment of the disclosures made herein is an apparatus adapted to facilitate error detection for Content Addressable Memory (CAM) modules. The apparatus includes an input error detection module and an output error detection module. The input error detection module includes a parity word generator that generates a key-based parity word after receiving a key. The key-based parity word and the key jointly define a comparand that is provided to the CAM module. The output error detection module includes a protection word generator that generates a key-based protection word after receiving the key and memory. The output error detection module includes a comparator connected to the protection word generator and to the memory. The comparator enables the predetermined protection word to be compared with the key-based protection word for facilitating issuance of an output error indication when the predetermined protection word is different than the key-based protection word.

REFERENCES:
patent: 6597595 (2003-07-01), Ichiriu et al.
patent: 6914795 (2005-07-01), Srinivasan et al.
patent: 6944039 (2005-09-01), Nataraj et al.
patent: 6947301 (2005-09-01), Regev et al.
patent: 6978343 (2005-12-01), Ichiriu
patent: 7002823 (2006-02-01), Ichiriu

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