Non-volatile memory devices having trenches

Details Non-volatile memory devices having trenches Non-volatile memory devices having trenches

2007-08-21

2007-08-21

Huynh, Andy N. (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S316000, C257SE21551

Reexamination Certificate

active

11020920

ABSTRACT:
A semiconductor memory device includes a semiconductor substrate having a trench therein. First and second gate patterns are formed on a surface of the substrate adjacent the trench, a respective one of which is on a respective opposing side of the trench. A split source/drain region is formed in the substrate between the first gate pattern and the second gate pattern such that the split source/drain region is divided by the trench. The split source/drain region includes a first source/drain subregion between the first gate pattern and the trench and a second source/drain subregion between the second gate pattern and the trench and spaced apart from the first source/drain subregion. A connecting region is formed in the substrate that extends around the trench from the first source/drain subregion to the second source/drain subregion. Related methods are also discussed.

REFERENCES:
patent: 5807778 (1998-09-01), Lee
patent: 6243295 (2001-06-01), Satoh
patent: 6531347 (2003-03-01), Huster et al.
patent: 6850439 (2005-02-01), Tanaka
patent: 2003/0094635 (2003-05-01), Yaegashi
patent: 2003/0124803 (2003-07-01), Ueda et al.
patent: 2003-152116 (2003-05-01), None
patent: 000001034 (2000-01-01), None
Office Action corresponding to German Patent Application No. 10-2005-030845.7-33 mailed on Oct. 17, 2006.

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