Dual-port memory array using shared write drivers and read...

Static information storage and retrieval – Read/write circuit

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S189040, C365S189030, C365S189080, C365S220000, C365S202000, C365S230050, C365S230060

Reexamination Certificate

active

11502817

ABSTRACT:
Dual port memory blocks that have a reduced layout area are provided. The write drivers and sense amplifiers are shared between the dual ports to reduce the number of write drivers and sense amplifiers to save layout area. The write drivers for the two ports are used to write into all of the first port's bitlines. The sense amplifiers for the two ports are used to read from all of the second port's bitlines. A memory block can to support true dual port (TDP) and simple dual port (SDP) operation using substantially less write drivers and sense amplifiers.

REFERENCES:
patent: 4745579 (1988-05-01), Mead et al.
patent: 4979145 (1990-12-01), Remington et al.
patent: 5276842 (1994-01-01), Sugita
patent: 5388072 (1995-02-01), Matick et al.
patent: 5396464 (1995-03-01), Slemmer
patent: 5544095 (1996-08-01), Longway et al.
patent: 5640534 (1997-06-01), Liu et al.
patent: 5781496 (1998-07-01), Pinkham et al.
patent: 5787041 (1998-07-01), Hill et al.
patent: 5847998 (1998-12-01), Van Buskirk
patent: 5978307 (1999-11-01), Proebsting et al.
patent: 6011730 (2000-01-01), Sample et al.
patent: 6065092 (2000-05-01), Roy
patent: 6084819 (2000-07-01), Kablanian
patent: 6097640 (2000-08-01), Fei et al.
patent: 6104642 (2000-08-01), Blomgren et al.
patent: 6157560 (2000-12-01), Zheng
patent: 6314047 (2001-11-01), Keay et al.
patent: 6339539 (2002-01-01), Gibson et al.
patent: 6370073 (2002-04-01), Leung
patent: 6373752 (2002-04-01), Wright et al.
patent: 6418067 (2002-07-01), Watanabe et al.
patent: 6421294 (2002-07-01), Hidaka
patent: 6434079 (2002-08-01), Kim
patent: 6467017 (2002-10-01), Ngai et al.
patent: 6515920 (2003-02-01), Nakano et al.
patent: 6519202 (2003-02-01), Shubat et al.
patent: 6556502 (2003-04-01), Ngal et al.
patent: 6661733 (2003-12-01), Pan et al.
patent: 6735727 (2004-05-01), Lee
patent: 6829682 (2004-12-01), Kirihata et al.
patent: 6845059 (2005-01-01), Wordeman et al.
patent: 7110304 (2006-09-01), Yu et al.
patent: 2001/0019512 (2001-09-01), Hidaka
“On-Chip Memory Implementations Using Cyclone Memory Blocks,” product technical information from Altera Corporation San Jose, CA (May 2003).
“Stratix Architecture,” product technical information from Altera Corporation San Jose, CA (Nov. 2003).

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Dual-port memory array using shared write drivers and read... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dual-port memory array using shared write drivers and read..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual-port memory array using shared write drivers and read... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3831849

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.