Method for writing data into a memory cell of a conductive...

Static information storage and retrieval – Systems using particular element – Resistive

Reexamination Certificate

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C365S189020, C365S189090

Reexamination Certificate

active

11222282

ABSTRACT:
The present invention refers to a method for writing data into a memory cell of a conductive bridging random access memory and to a memory circuit comprising memory cells with programmable metallization cells, particularly a CBRAM memory circuit. The embodiments of the prevent invention provide a method and a memory circuit for holding adjacently arranged bit lines at writing voltages during a writing operation of a selected memory cell to reduce voltage crosstalk.

REFERENCES:
patent: 6731528 (2004-05-01), Hush et al.
patent: 6865117 (2005-03-01), Kozicki
patent: 6873538 (2005-03-01), Hush
patent: 6888773 (2005-05-01), Morimoto
patent: 6909656 (2005-06-01), Moore et al.
patent: 6961277 (2005-11-01), Moore et al.
patent: 2002/0154531 (2002-10-01), Lowrey et al.
patent: 2006/0050547 (2006-03-01), Liaw et al.
patent: 1306852 (2003-05-01), None
patent: 1326258 (2003-07-01), None
patent: 1426974 (2004-06-01), None
patent: 1450343 (2004-08-01), None
M.N. Kozicki, M. Mitkova, J. Zhu, M. Park, and C. Gopalan, “Can Solid State Electrochemistry Eliminate The Memory Scaling Quandary?” Extended Abstracts of the 2002 IEEE Silicon Nanoelectronics Workshop, Honolulu, HI, Jun. 2002.

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