Method for fabricating a self aligned mask ROM

Details Method for fabricating a self aligned mask ROM Method for fabricating a self aligned mask ROM

1994-10-05

1996-06-04

Tsai, H. Jey

Fishing, trapping, and vermin destroying

437 45, 437 52, H01L 21265

Patent

active

055232515

ABSTRACT:
A method of manufacturing mask ROM using LPD to obtain the advantages of self-alignment. The bit line resistance and bit line capacitance are both reduced due to prevention of counterdoping but the device breakdown voltage is maintained. Oxide regions are deposited over the bit lines by LPD to form mesas thereon. When a conductive layer is deposited, recesses in the conductive layer occur in channel regions between neighboring mesas. When programming the device by implanting impurities, they automatically concentrate in the channel regions between the bit lines, in a self-aligned manner, therefore counterdoping of the bit lines is prevented.

REFERENCES:
patent: 5308777 (1994-05-01), Hong

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