Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-02-27

2007-02-27

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S230030

Reexamination Certificate

active

11137583

ABSTRACT:
A semiconductor memory device capable of improving the reliability when driving a word line and capable of reducing the access delay due to the defect relief is provided. In order to prevent the multiple selection of a sub-word line of a normal memory mat and a sub-word line of a redundant memory mat, the start of the redundant memory mat is delayed from that of the normal memory mat, and in order to compensate the start delay, the shared circuit is eliminated and the bit line length is reduced in the redundant memory mat. By doing so, the read time of the bit lines is reduced and the signal amount is increased. Consequently, the same activation timing of the sense amplifier as that of the normal memory mat can be used also in the redundant memory mat.

REFERENCES:
patent: 5021944 (1991-06-01), Sasaki et al.
patent: 5715189 (1998-02-01), Asakura
patent: 6258642 (2001-07-01), Holst
patent: 6545897 (2003-04-01), Fujisawa et al.
patent: 6567290 (2003-05-01), Alexanian
patent: 2-21500 (1990-01-01), None
patent: 4-345998 (1992-12-01), None

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