Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-01-02
2007-01-02
Lin, Sun James (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
10816799
ABSTRACT:
The present invention is directed to methods for verifying adequate synchronization of signals that cross clock environments. According to one exemplary method, a circuit under design includes a plurality of functional elements and a plurality of clock environments, and has one or more signals passing from one clock environment to another therein. The method includes the steps of (i) modelling at least one of the functional elements to have an unknown state as an output for a predetermined time after a timing event of a clock signal, (ii) simulating the circuit, and (iii) determining which functional element is a synchronizer to thereby identify if there is a synchronization problem for a signal passing from one clock environment to another.
REFERENCES:
patent: 5796995 (1998-08-01), Nasserbakht et al.
patent: 6353906 (2002-03-01), Smith et al.
patent: 6424189 (2002-07-01), Su et al.
patent: 6473439 (2002-10-01), Zerbe et al.
patent: 2004/0066870 (2004-04-01), Gabara et al.
Lin Sun James
STMicroelectronics Limited
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