Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2007-02-06
2007-02-06
Graybill, David E. (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S311000, C438S409000, C438S413000, C438S479000, C438S481000, C438S967000, C257SE21562, C257SE21563, C257SE21565
Reexamination Certificate
active
10883887
ABSTRACT:
A cost efficient and manufacturable method of fabricating strained semiconductor-on-insulator (SSOI) substrates is provided that avoids wafer bonding. The method includes growing various epitaxial semiconductor layers on a substrate, wherein at least one of the semiconductor layers is a doped and relaxed semiconductor layer underneath a strained semiconductor layer; converting the doped and relaxed semiconductor layer into a porous semiconductor via an electrolytic anodization process, and oxidizing to convert the porous semiconductor layer into a buried oxide layer. The method provides a SSOI substrate that includes a relaxed semiconductor layer on a substrate; a high-quality buried oxide layer on the relaxed semiconductor layer; and a strained semiconductor layer on the high-quality buried oxide layer. In accordance with the present invention, the relaxed semiconductor layer and the strained semiconductor layer have identical crystallographic orientations.
REFERENCES:
patent: 5950094 (1999-09-01), Lin et al.
patent: 6812116 (2004-11-01), Huang et al.
patent: 6828214 (2004-12-01), Notsu et al.
patent: 6881650 (2005-04-01), Lee et al.
patent: 7001826 (2006-02-01), Akatsu et al.
patent: 2002/0146892 (2002-10-01), Notsu et al.
patent: 2003/0003679 (2003-01-01), Doyle et al.
patent: 2003/0119280 (2003-06-01), Lee et al.
patent: 2004/0067622 (2004-04-01), Akatsu et al.
patent: 2004/0115900 (2004-06-01), Huang et al.
patent: 2004/0227187 (2004-11-01), Cheng et al.
patent: 2004/0266137 (2004-12-01), Huang et al.
patent: 2005/0056352 (2005-03-01), Bedell et al.
patent: 2006/0175608 (2006-08-01), Celler
patent: WO2004073043 (2004-08-01), None
Mizuno, T. et al. “High Performance Strained-Si p-MOSFETs on SiGe-on-Insulator Substrates Fabricated by SIMOX Technology.” IEDM p. 934-936 (1999).
Adam Thomas N.
Bedell Stephen W.
de Souza Joel P.
Fogel Keith E.
Reznicek Alexander
Graybill David E.
Scully , Scott, Murphy & Presser, P.C.
Trepp, Esq. Robert M.
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