Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2007-06-12
2007-06-12
Hur, J. H. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S205000, C365S190000, C365S196000, C365S203000, C365S208000, C327S051000, C327S052000, C327S055000, C327S057000
Reexamination Certificate
active
11191709
ABSTRACT:
An amplifier circuit includes an amplifier section (700), an equalization section (770), and an activation section (720). The P-channel transistors (702, 704) of the amplifier section are coupled to a supply terminal (802). The N-channel transistors (706, 708) of the amplifier section are coupled between the P-channel transistors and the first and second input terminals (760, 762), respectively. In the activation section, first and second pull down transistors (722, 724) are coupled between the first and second input terminals, respectively, and a second power supply terminal (726), and third pull down transistor between the first and second input terminals. The control gates of the first, second and third pull down transistors are coupled to each other. In operation, a voltage signal applied to the first and second input terminals is amplified by the N-channel transistors. A control signal is then applied to couple the first and second input terminals to a supply voltage.
REFERENCES:
patent: 5345419 (1994-09-01), Fenstermaker et al.
patent: 5477497 (1995-12-01), Park et al.
patent: 5644418 (1997-07-01), Woodward
patent: 6043527 (2000-03-01), Forbes
patent: 6288575 (2001-09-01), Forbes
patent: 6424181 (2002-07-01), Pogrebnoy
patent: 7023243 (2006-04-01), Wijetunga et al.
Evert Seevinck et al., “Current-Mode Techniques for High-Speed VLSI Circuits with Application to Current Sense Amplifier for CMOS SRAM's,”IEEE Journal of Solid-State Circuits, vol. 26, No. 4, Apr. 1991, pp. 525-536.
Travis N. Blalock et al., “A High-Speed Sensing Scheme for 1T Dynamic RAM's Utilizing the Clamped Bit-Line Sense Amplifier,”IEEE Journal of Solid-State Circuits, vol. 27, No. 4, Apr. 1992, pp. 618-625.
Travis N. Blalock et al., “A High-Speed Clamped Bit-Line Current-Mode Sense Amplifier,”IEEE Journal of Solid-State Circuits, vol. 26, No. 4, Apr. 1991, pp. 542-548.
Aiyappan Natarajan et al., “A Study of Sense Amplifiers for Advanced Microprocessor Caches in 70nm Technology,” Intel Circuit Research Labs (CRL), Hillsboro, OR.
Madan Sudhir K.
Sheffield Bryan
Brady III W. James
Garner Jacqueline J.
Hur J. H.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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