Ferroelectric polymer memory with a thick interface layer

Details Ferroelectric polymer memory with a thick interface layer Ferroelectric polymer memory with a thick interface layer

2007-01-30

2007-01-30

Smoot, Stephen W. (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C438S003000

Reexamination Certificate

active

10676795

ABSTRACT:
According to one aspect of the invention, a memory array and a method of constructing a memory array are provided. An insulating layer is formed on a semiconductor substrate. A first metal stack is then formed on the insulating layer. The first metal stack is etched to form first metal lines. A polymeric layer is formed over the first metal lines and the insulating layer. The polymeric layer has a surface with a plurality of roughness formations. A second metal stack is formed on the polymeric layer with an interface layer, which is thicker than the heights of the roughness formations. Then the second metal stack is etched to form second metal lines. Memory cells are formed wherever a second metal line extends over a first metal line.

REFERENCES:
patent: 6117798 (2000-09-01), Fang et al.
patent: 6825060 (2004-11-01), Lyons et al.
patent: 2001/0050869 (2001-12-01), Nishikawa et al.
patent: 2003/0017623 (2003-01-01), Li et al.
patent: 2004/0209420 (2004-10-01), Ljungcrantz et al.
“Polymer Memory: The plastic path to better data storage,” Upstream Spotlight on a Hot Technology to Watch, Technology Review, Sep. 2002, p. 31.

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