Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2007-05-01
2007-05-01
Elmore, Reba I. (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S154000
Reexamination Certificate
active
10747846
ABSTRACT:
A method for apparatus for masking a postamble ringing phenomenon in a DDR SDRAM comprising the steps of storing data, which are applied from a memory controller, in a data input latch through a data buffer and aligning the stored data, controlling the data input latch in such a manner that the data stored in the data input latch do not change, transmitting the data stored in the data input latch to a data input/output detection amplifier, enabling the data input latch to receive new data after the data, which have been transmitted to the data input/output detection amplifier, are transmitted to a global input/output line. In the method, a stable write operation can be performed even in devices having high operation speeds, such data rates above 400 MHz. Thus, a stable write operation can be performed under conditions wherein the tDQSS has a value of 0.75tCK to 1.25tCK.
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‘General DDR SDRAM Functionality’, Micron Technical Note, TN-46-05, pp. 1-11, Micron Technology Inc., 2001.
Elmore Reba I.
Hynix / Semiconductor Inc.
Ladas & Parry LLP
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