Semiconductor memory

Details Semiconductor memory Semiconductor memory

2007-11-27

2007-11-27

Dinh, Son (Department: 2824)

Static information storage and retrieval

Read/write circuit

Testing

C365S185330, C365S185290, C365S185120

Reexamination Certificate

active

10694861

ABSTRACT:
A plurality of memory cell arrays Array0, Array1, Array2, Array3, Array4, Array5, Array6and Array7which can perform a parallel operation are arranged in a later generation chip. Each of the memory cell arrays Array0and Array4, the memory cell arrays Array1and Array5, the memory cell arrays Array2and Array6, and the memory cell arrays Array3and Array7constitutes one cell array group. A Pass/Fail signal indicative of success or failure of the operation is outputted in accordance with each cell array group. It is good to make the number of cell array groups equal to the number of memory cell arrays or the number of cell array groups of a precedent generation chip.

REFERENCES:
patent: 5034928 (1991-07-01), Isobe
patent: 6031760 (2000-02-01), Sakui et al.
patent: 2003/0214853 (2003-11-01), Hosono et al.
patent: 2004/0145952 (2004-07-01), Chen et al.
patent: 7-281952 (1995-10-01), None
patent: 9-82923 (1997-03-01), None
patent: 11-224492 (1999-08-01), None
patent: 2001-155500 (2001-06-01), None
patent: 2001-167586 (2001-06-01), None

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