Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...
Reexamination Certificate
2007-07-03
2007-07-03
Barnie, Rexford (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Having details of setting or programming of interconnections...
C326S037000, C326S038000, C326S039000, C326S040000, C326S041000, C326S047000, C716S030000
Reexamination Certificate
active
11221289
ABSTRACT:
A memory element structure in a programmable logic device (PLD) reduces power consumption by placing the memory element in a power save mode when the memory element is unused in a user design implemented in the PLD. An exemplary structure includes a multiplexer driving a memory element. A multiplexer control circuit controls the multiplexer, and also drives a clock control circuit for the memory element. When the memory element is used by a user design implemented in the PLD, one of the data inputs is selected to drive the memory element. The controlled functions occur normally in the memory element. When the memory element is not used by the user design, none of the data inputs is selected, an input control signal is intercepted by the clock control circuit, and the controlled functions do not occur in the memory element, reducing the power consumption of the unused memory element.
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Barnie Rexford
Cartier Lois D.
White Dylan
Xilinx , Inc.
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