Method and apparatus for preservation of failure state in a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S006130

Reexamination Certificate

active

09888123

ABSTRACT:
One aspect of the invention provides a novel scheme to preserve the failure state of a memory location. According to one embodiment, the data is read from a memory location in a read-destructive memory device. If the data is found to be valid (uncorrupted) it is written back to the memory location from where it was read in order to preserve it. If the data is found to be invalid (corrupted) then a failure codeword is written in the memory location to indicate a failure of the memory location. The failure codeword may be preselected or dynamically calculated so that it has a mathematical distance greater than all correctable data patterns.

REFERENCES:
patent: 4953022 (1990-08-01), Bugg
patent: 5193010 (1993-03-01), Juri et al.
patent: 5632013 (1997-05-01), Krygowski et al.
patent: 6225655 (2001-05-01), Moise et al.
patent: 0 381 885 (1990-08-01), None

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