Method and system for generating parallel decodable low...

Details Method and system for generating parallel decodable low... Method and system for generating parallel decodable low...

2007-11-13

2007-11-13

Dildine, R. Stephen (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

Reexamination Certificate

active

10882705

ABSTRACT:
An approach is provided for efficiently decoding low density parity check (LDPC) codes. An LDPC decoder includes a memory for storing a mapped matrix that satisfies a plurality of parallel decodable conditions for permitting a lumped memory structure. Additionally, the decoder includes a parallel processors accessing edge values from the stored mapped matrix decode the LDPC codes. The above approach has particular applicability to satellite broadcast systems.

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