Semiconductor device including silicided source and drain...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S384000

Reexamination Certificate

active

10821886

ABSTRACT:
A method for manufacturing a MOSFET equipped with a silicide layer over shallow source and drain junctions without leakage generation is provided. By restricting the temperature of manufacturing steps after the silicide formation below a critical temperature Tc, which is defined below as a function of a junction depth Dj from 20 nm to 60 nm, leakage generation is practically suppressed.in-line-formulae description="In-line Formulae" end="lead"?Tc=a×Dj+b,in-line-formulae description="In-line Formulae" end="tail"?wherea=6.11⁢⁢(20<Dj≤26)⁢=1.60⁢⁢(26<Dj≤60),b=290.74⁢⁢(20<Dj≤26)⁢=408⁢⁢(26<Dj≤60),Dj is a junction depth (nm) measured from the lower surface of the silicide layer, and Tc is a critical temperature (° C.) during a heat treatment.

REFERENCES:
patent: 6271132 (2001-08-01), Xiang et al.
patent: 6683356 (2004-01-01), Tsuchiaki
patent: 2003/0235984 (2003-12-01), Besser et al.
patent: 2004/0061184 (2004-04-01), Lu et al.
patent: 2004/0229473 (2004-11-01), Bohr
patent: 2000-150669 (2000-05-01), None
patent: 2001-284284 (2001-10-01), None
patent: 2002-368008 (2002-12-01), None
patent: 2002-543623 (2002-12-01), None
U.S. Appl. No. 10/256,164, filed Sep. 27, 2002, Tsuchiaki.
U.S. Appl. No. 10/947,381, filed Sep. 23, 2004, Tsuchiaki.

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