Semiconductor device and manufacturing method thereof

Details Semiconductor device and manufacturing method thereof Semiconductor device and manufacturing method thereof

2007-01-16

2007-01-16

Everhart, Caridad (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C257S072000, C257SE21051, C257SE21411

Reexamination Certificate

active

09894950

ABSTRACT:
OFF current of a TFT is reduced. There is provided a semiconductor device includung: a substrate; a shielding film formed so as to be in contact with the substrate; a planarization insulating film formed on the substrate so as to cover the shielding film; and a semiconductor layer formed so as to be in contact with the planarization insulating film. The semiconductor device is characterized in that the shielding film overlaps the semiconductor layer with the planarization insulating film sandwiched therebetween, and that the planarization insulating film is polished by CMP before the semiconductor layer is formed.

REFERENCES:
patent: 5079606 (1992-01-01), Yamamura et al.
patent: 5585951 (1996-12-01), Noda et al.
patent: 5605847 (1997-02-01), Zhang
patent: 5637894 (1997-06-01), Hori et al.
patent: 5643801 (1997-07-01), Ishihara et al.
patent: 5818552 (1998-10-01), Sato
patent: 5853960 (1998-12-01), Tran et al.
patent: 5886364 (1999-03-01), Zhang
patent: 5889302 (1999-03-01), Liu
patent: 5891764 (1999-04-01), Ishihara et al.
patent: 5966193 (1999-10-01), Zhang et al.
patent: 6067131 (2000-05-01), Sato
patent: 6100954 (2000-08-01), Kim et al.
patent: 6198133 (2001-03-01), Yamazaki et al.
patent: 6243155 (2001-06-01), Zhang et al.
patent: 6252248 (2001-06-01), Sano et al.
patent: 6259200 (2001-07-01), Morita et al.
patent: 6294815 (2001-09-01), Yamazaki et al.
patent: 6326249 (2001-12-01), Yamazaki et al.
patent: 6327006 (2001-12-01), Sato et al.
patent: 6331473 (2001-12-01), Hirabayashi
patent: 6335540 (2002-01-01), Zhang
patent: 6340830 (2002-01-01), Takemura
patent: 6380561 (2002-04-01), Ohtani et al.
patent: 6392255 (2002-05-01), Shibata et al.
patent: 6396105 (2002-05-01), Yamazaki et al.
patent: 6462806 (2002-10-01), Zhang et al.
patent: 6555420 (2003-04-01), Yamazaki
patent: 6567136 (2003-05-01), Sakuramoto et al.
patent: 6573589 (2003-06-01), Zhang
patent: 6576926 (2003-06-01), Yamazaki et al.
patent: 6583472 (2003-06-01), Shibata et al.
patent: 6630722 (2003-10-01), Aoki
patent: 6638800 (2003-10-01), Ishihara et al.
patent: 6740938 (2004-05-01), Tsunoda et al.
patent: 2002/0142512 (2002-10-01), Ma et al.
patent: 0 450 941 (1991-10-01), None
patent: 0 762 180 (1997-03-01), None
patent: 0 997 769 (2000-05-01), None
patent: 1 081 676 (2001-03-01), None
patent: 1 087 438 (2001-03-01), None
patent: 59-121876 (1984-07-01), None
patent: 07-130652 (1995-05-01), None
patent: 08-078329 (1996-03-01), None
patent: 09-043639 (1997-02-01), None
patent: 10-031235 (1998-02-01), None
patent: 10-135468 (1998-05-01), None
patent: 10-135469 (1998-05-01), None
patent: 10-189999 (1998-07-01), None
patent: 11-08776 (1999-03-01), None
patent: 11-087726 (1999-03-01), None
patent: 2000-010120 (2000-01-01), None
patent: 3141860 (2000-12-01), None
Yamazaki, et al., U.S. Appl. No. 09/797,186 (pending), filed Mar. 2, 2001, “Semiconductor Device and Manufacturing Method Thereof”, pp. 70 specification, pp. 26 claims (claims 80), pp. 1 abstract, Figs. 1-24, one table.
Yamazaki, et al., U.S. Appl. No. 09/809,646 (pending), filed Mar. 16, 2001, “Semiconductor Display Device and Manufacturing Method Thereof”, pp. 57 specification, pp. 11 claims (claims 25); pp. 1 abstract , Figs. 1-23.
Hirai et al.; “A High-Aperture-Ratio a-Si TFT Liquid Crystal Light Valve for Workstations”;NEC Research&Development 35, No. 2; pp. 165-170; Apr. 1994.
Kumar et al.; “Kink-free Polycrsytalline Silicon Double-Gate Elevated-Channel Thin-Film Transistors”;IEEE Transactions on Electron Devices, vol. 45, No. 1; pp. 2514-2520; Dec. 1998.
Yoo et al.; “Pixel Design for TFT-LCD with Double Gate Poly-Si TFT and Double Valve Layer Storage Capacitor”; School of Electrical Engineering, Seoul National University, Seoul, Korea, Samsung Electronics Co., Ltd.;Proceedings of the Fourth Asian Symposium on Information Display; pp. 219-222; 1997.

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