Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2007-09-11
2007-09-11
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S100000, C365S189011, C365S190000, C365S225700
Reexamination Certificate
active
10733413
ABSTRACT:
A memory system and a method of reading and writing data to a memory device selectively operate in both a single DQS mode with data inversion, and in a dual DQS mode. The device and method employ data strobe mode changing means for selectively changing operation of the memory device between a first data strobe mode and a second data strobe mode.
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“ELPIDA 128M bits Self Terminated Interfaced DDR SDRAM” data sheets, Nov. 2002, pp. 1-46.
Kim Matthew
Thomas Shane M
Volentine & Whitt PLLC
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