Divisible true dual port memory system supporting simple...

Details Divisible true dual port memory system supporting simple... Divisible true dual port memory system supporting simple...

2007-09-11

2007-09-11

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Addressing

Multiple port access

C365S189020, C365S230030

Reexamination Certificate

active

11501616

ABSTRACT:
A random access memory circuit and a method for configuring the same. The circuit includes a first array of memory cells including a first plurality of ports and a second plurality of ports, and a second array of memory cells including a third plurality of ports and a fourth plurality of ports. Additionally, the circuit includes a plurality of switches connected to the first plurality of ports and the third plurality of ports respectively or connected to the second plurality of ports and the fourth plurality of ports respectively. Moreover, the circuit includes a plurality of sense amplifiers and a plurality of write drivers.

REFERENCES:
patent: 4296467 (1981-10-01), Nibby et al.
patent: 4636982 (1987-01-01), Takemae et al.
patent: 5978307 (1999-11-01), Proebsting et al.

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