Floating body cell dynamic random access memory with...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257SE29170

Reexamination Certificate

active

10824535

ABSTRACT:
A semiconductor device includes a semiconductor substrate; a first insulation layer formed on the semiconductor substrate; a semiconductor layer insulated from the semiconductor substrate by the insulation layer; a source region of a first conduction type and a drain region of the first conduction type formed in the semiconductor layer; a body region of a second conduction type formed in the semiconductor layer between the source region and the drain region, said body region being capable of storing data by accumulating or releasing electric charge; a second insulation layer formed on the body region; a word line formed on the second insulation layer and insulated from the body region by the second insulation layer; and a bit line electrically connected to the drain region, wherein the area of the body region in contact with the first insulation layer is larger than the area thereof in contact with the second insulation layer.

REFERENCES:
patent: 5784311 (1998-07-01), Assaderaghi et al.
patent: 6538916 (2003-03-01), Ohsawa
patent: 6617651 (2003-09-01), Ohsawa
patent: 6703673 (2004-03-01), Houston
patent: 2003/0015757 (2003-01-01), Ohsawa
patent: 2004/0026749 (2004-02-01), Ohsawa
patent: 2002-246571 (2002-08-01), None
patent: 2003-17691 (2003-01-01), None
patent: 2003-31693 (2003-01-01), None
patent: 2003-31696 (2003-01-01), None
patent: 2003-188251 (2003-07-01), None
Kazumi Inoh, et al., “FBC (Floating Body Cell) for Embedded DRAM on SOI”, Symposium on VLSI Technology Digest of Technical Papers, 2003, pp. 63-64.
Takashi Ohsawa, et al., “Memory Design Using a One-Transistor Gain Cell on SOI”, IEEE Journal of Solid-State Circuits, vol. 37, No. 11, Nov. 2002, pp. 1510-1522.

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