Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2007-05-15
2007-05-15
Smith, Bradley K. (Department: 2891)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C257SE21438
Reexamination Certificate
active
11027519
ABSTRACT:
Methods for fabricating a shallow trench isolation (STI) of a semiconductor device are disclosed. A disclosed method includes: forming a trench on a semiconductor substrate, forming an oxide layer on the semiconductor substrate and the trench, forming a photoresist pattern on the oxide layer exposing the oxide layer on a bottom surface of the trench, forming STI films on sidewalls of the trench by etching the exposed oxide layer using the photoresist pattern as an etch protection layer, removing the photoresist pattern, developing an epitaxial layer between the STI, and planarizing the epitaxial layer and the oxide layer.
REFERENCES:
patent: 6436791 (2002-08-01), Lin et al.
patent: 6444518 (2002-09-01), Jang et al.
patent: 6723618 (2004-04-01), Meyer et al.
Dongbu Electronics Co. Ltd.
Fortney Andrew D.
Smith Bradley K.
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