Stacked memory cell having diffusion barriers

Details Stacked memory cell having diffusion barriers Stacked memory cell having diffusion barriers

2007-03-06

2007-03-06

Lee, Eugene (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S767000, C257S295000, C257S296000, C257S300000

Reexamination Certificate

active

10666381

ABSTRACT:
A nonconductive hydrogen barrier layer is deposited on a substrate and completely covers the surface area over a memory capacitor and a MOSFET switch of an integrated circuit memory cell. A portion of an insulator layer adjacent to the bottom electrode of a memory capacitor is removed by etching to form a moat region. A nonconductive oxygen barrier layer is deposited to cover the sidewall and bottom of the moat. The nonconductive oxygen barrier layer and a conductive diffusion barrier beneath the capacitor together provide a substantially continuous diffusion barrier between the capacitor and a switch. Also, the nonconductive hydrogen barrier layer, the nonconductive oxygen barrier, and the conductive diffusion barrier substantially completely envelop the capacitor, in particular a ferroelectric thin film in the capacitor.

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Koyama et al., “A Stacked Capacitor With (BaxSr1-x)TiO3 For 256M DRAM”, IEEE, 1991, pp. 823-826.

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