Memory redundancy programming

Details Memory redundancy programming Memory redundancy programming

2007-01-09

2007-01-09

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S201000, C365S225700

Reexamination Certificate

active

11299868

ABSTRACT:
A method and apparatus is provided for performing a redundancy programming. The system of the present invention includes a device testing unit for performing a memory test. The system also includes a memory device operatively coupled to the device testing unit. The memory device includes an access transistor that includes a charge trapping area. A threshold voltage of the access transistor is modified upon trapping of charges in the charge trapping unit. The memory device also includes a memory element and a fuse associated with the memory element. The fuse is capable of entering an alternative state in response to modifying the threshold voltage of the access transistor. The state of the fuse may be used to program or de-program the memory element.

REFERENCES:
patent: 5442589 (1995-08-01), Kowalski
patent: 7006392 (2006-02-01), Parekh

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