Integrated circuit having a programmable input structure...

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C326S041000, C326S047000

Reexamination Certificate

active

11151819

ABSTRACT:
A programmable input structure for a programmable logic circuit provides the capability of “fanning out” a selected signal to two or more input terminals of the programmable logic circuit, thereby increasing the routability of the logic block input signals. A logic block for an integrated circuit includes a programmable logic circuit and input multiplexers programmably selecting an input signal to provide to the programmable logic circuit. Also included in the integrated circuit are fan multiplexers that do not drive the programmable logic circuit directly. Instead, the fan multiplexers drive two or more of the input multiplexers that can, optionally, drive other input multiplexers in the same logic block, providing additional selection options among potential input signals. In some embodiments, the fan multiplexers are driven by global and/or regional clock signals. Thus, existing clock distribution structures can be used to provide high fanout input signals to the programmable logic circuit.

REFERENCES:
patent: 5296759 (1994-03-01), Sutherland et al.
patent: 5581199 (1996-12-01), Pierce et al.
patent: 5701091 (1997-12-01), Kean
patent: 5914616 (1999-06-01), Young et al.
patent: 5920202 (1999-07-01), Young et al.
patent: 5942913 (1999-08-01), Young et al.
patent: 5963050 (1999-10-01), Young et al.
patent: 6051992 (2000-04-01), Young et al.
patent: 6069490 (2000-05-01), Ochotta et al.
patent: 6081914 (2000-06-01), Chaudhary
patent: 6107827 (2000-08-01), Young et al.
patent: 6124731 (2000-09-01), Young et al.
patent: 6184712 (2001-02-01), Wittig et al.
patent: 6201410 (2001-03-01), New et al.
patent: 6204689 (2001-03-01), Percey et al.
patent: 6204690 (2001-03-01), Young et al.
patent: 6292022 (2001-09-01), Young et al.
patent: 6362648 (2002-03-01), New et al.
patent: 6396302 (2002-05-01), New et al.
patent: 6396303 (2002-05-01), Young
patent: 6448808 (2002-09-01), Young et al.
patent: 6452834 (2002-09-01), Kengeri
patent: 6630841 (2003-10-01), New et al.
patent: 6847229 (2005-01-01), New et al.
patent: 6937064 (2005-08-01), Lewis et al.
patent: 2002/0008541 (2002-01-01), Young et al.
patent: 2005/0127944 (2005-06-01), Lewis et al.
U.S. Appl. No. 11/151,796, filed Jun. 14, 2005, Young et al.
U.S. Appl. No. 11/151,892, filed Jun. 14, 2005, Young et al.
U.S. Appl. No. 11/151,915, filed Jun. 14, 2005, Young et al.
U.S. Appl. No. 11/151,938, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/151,939, filed Jun. 14, 2005, Chirania et al.
U.S. Appl. No. 11/151,986, filed Jun. 14, 2005, Simkins.
U.S. Appl. No. 11/151,987, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/151,988, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,010, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,012, filed Jun. 14, 2005, Pham et al.
U.S. Appl. No. 11/152,358, filed Jun. 14, 2005, Bauer et al.
U.S. Appl. No. 11/152,359, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,360, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,439, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,572, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,590, filed Jun. 14, 2005, Kondapalli et al.
U.S. Appl. No. 11/152,637, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,736, filed Jun. 14, 2005, Kondapalli et al.
U.S. Appl. No. 11/152,737, filed Jun. 14, 2005, Kondapalli et al.
U.S. Appl. No. 11/152,763, filed Jun. 14, 2005, Young.
Lucent Technologies; “Field Programmable Gate Arrays Data Book”; published Oct. 1996; pp. 2-9 through 2-28.
Altera Corporation; “Stratix Device Handbook; vol. 1”; “2. Stratix Architecture”; published Sep. 2004; pp. 2-1 through 2-20.
Xilinx, Inc.; “Virtex-II Platform FPGA Handbook”; published Dec. 2000; available from Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124; pp. 33-75.
Xilinx, Inc.; “Programmable Logic Data Book 2000”; Published Apr. 2000; available from Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124; pp. 3-75 through 3-96.
Xilinx, Inc.; “Virtex-II Pro Platform FPGA Handbook”; published Oct. 14, 2002; available from Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124; pp. 19-71.
Altera Corporation; “FLEX 10K Embedded Programmable Logic Family Data Sheet”; Digital Library 1996; pp. 31-53, no month.
Xilinx, Inc.; “Programmable Logic Data Book 1996”; published Sep. 1996; available from Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124; pp. 4-5 through 4-45, 4-181 through 4-196, 4-253 through 4-264, and 4-289 through 4-302.
Xilinx, Inc.; “The Programmable Logic Data Book 1994”; published 1994; available from Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124; pp. 2-187 through 2-195, no month.
Altera Corporation; “Stratix-II Device Handbook”; vol. 1; published Mar. 2005; pp. 2-1 through 2-28.
Steven Elzinga et al.; “Design Tips for HDL Implementation of Arithmetic Functions”; XAPP215 (v1.0); Jun. 28, 2000; available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124; pp. 1-13.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Integrated circuit having a programmable input structure... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit having a programmable input structure..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit having a programmable input structure... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3781338

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.