Methods and apparatus for address generation in processors

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C711S212000

Reexamination Certificate

active

10747764

ABSTRACT:
Methods and apparatus to generate addresses in processors are disclosed. An example address generator disclosed herein includes an adder to add a first address component and a second address component to generate an address, a correction indicator to indicate if the address is correct, and a control input to modify an operation of the adder.

REFERENCES:
patent: 5233553 (1993-08-01), Shak et al.
patent: 5511017 (1996-04-01), Cohen et al.
patent: 5970512 (1999-10-01), Martens et al.
patent: 6066965 (2000-05-01), Blomgren et al.
patent: 6105126 (2000-08-01), Check et al.
patent: 6105129 (2000-08-01), Meier et al.
patent: 6209076 (2001-03-01), Blomgren
patent: 6457115 (2002-09-01), McGrath
patent: 2002/0194452 (2002-12-01), Catherwood
patent: 2003/0093775 (2003-05-01), Hilton
P6 Family of Processors: Hardware Developer's Manual, Intel Corporation, Sep. 1998, 16 pages.
IS 32 Intel Architecture Software Developer's Manual, vol. 3: System Programing Guide, Intel Corporation, 2003, Chapter 2: System Architecture Overview, pp. 2.1-2.7.
IS 32 Intel Architecture Software Developer's Manual, vol. 3: System Programing Guide, Intel Corporation, 2003, Chapter 3: Protected-Mode Memory Management, pp. 3.1-3.38.
IA-32 Intel® Architecture Optimization: Reference Manual, Intel Corporation, 2003, Chapter 1: IA-32 Intel® Architecture Processor Family Overview, pp. 1.1-1.34.
IA-32 Intel® Architecture Software Developer's Manual, vol. 1: Basic Architecture, Intel Corporation, 2003, Chapter 3: Basic Execution Environment, pp. 3.1-3.17.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Methods and apparatus for address generation in processors does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods and apparatus for address generation in processors, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods and apparatus for address generation in processors will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3779867

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.