Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2007-05-01
2007-05-01
Verbrugge, Kevin (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S113000, C711S130000, C711S131000
Reexamination Certificate
active
10990496
ABSTRACT:
A disk array controller which includes a channel interface unit for connecting a host computer through a first type channel, a channel interface unit for connecting a host computer through a second type channel, a plurality of disk interface units provided with an interface with a magnetic disk unit respectively, a cache memory unit, and a shared memory unit. The number of access paths connected to said cache memory unit is less than the number of access paths connected to the shared memory unit.
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Japanese Patent Office communication - Office Action mailed on Jan. 18, 2007, 3 pages, translated.
Fujibayashi Akira
Fujimoto Kazuhisa
Tanaka Atsushi
Hitachi , Ltd.
Mattingly ,Stanger ,Malur & Brundidge, P.C.
Verbrugge Kevin
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