Semiconductor memory device and method of reading data

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S295000, C257S310000

Reexamination Certificate

active

10738999

ABSTRACT:
First and second ferroelectric capacitors are selectively connected with a first bit line. Data is read to the first bit line from a first ferroelectric capacitor by applying a first voltage in a coordinate increasing direction of an axis or from the second ferroelectric capacitor by applying a second voltage having a sign opposite to the first voltage in the coordinate increasing direction. Third and fourth ferroelectric capacitors are selectively connected with a second bit line. Data is read to the second bit line from the third ferroelectric capacitor by applying a third voltage having the same sign as the first voltage in the coordinate increasing direction or from the fourth ferroelectric capacitor by applying a fourth voltage having the same sign as the second voltage in the coordinate increasing direction. A sense amplifier amplifies the potential difference between the first and second bit lines.

REFERENCES:
patent: 6611015 (2003-08-01), Ozaki et al.
patent: 10-255483 (1998-09-01), None
patent: 11-177036 (1999-07-01), None
D. Takashima, et al., “High-Density Chain Ferroelectric Random-Access Memory (CFRAM)”, 1997 Symposium on VLSI Circuits Digest of Technical Papers, pp. 83-84, 1997.

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