Non-volatile memory

Details Non-volatile memory Non-volatile memory

2007-07-10

2007-07-10

Le, Dung A. (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S314000, C257S315000, C257SE21209, C438S257000, C365S185040

Reexamination Certificate

active

11180080

ABSTRACT:
A stacked structure is formed over a substrate, and the stacked structure has a gate dielectric layer and a floating gate thereon. A first dielectric layer, a second dielectric layer and a third dielectric layer are respectively formed over the top and the sidewalls of the stacked structure and the exposed substrate. A charge storage layer covers over the top and sidewalls of the stacked structure. Also, a pair of auxiliary gates is formed over the substrate beside the charge storage layer, and a gap is between the auxiliary gates and the charge storage layer.

REFERENCES:
patent: 5422504 (1995-06-01), Chang et al.
patent: 5625213 (1997-04-01), Hong et al.
“A Novel CMOS-Compatible Top-Floating-Gate EEPROM Cell for Embedded Applications” By Author Diarmuid McCathy e al. / IEEE Transactions on Electron Devices, vol. 50, No. 7, Jul. 2003 / p. 1708-1711.
“90-nm-node multi-level AG-AND type flash memory with cell size of true 2 F2/bit and programming throughput of 10 MB/s” By Author Y. Sasago et al / 2003 IEEE.

Affiliated with

Also associated with

Rating

Non-volatile memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Non-volatile memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-volatile memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3771445