Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2007-03-20
2007-03-20
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C257SE21421
Reexamination Certificate
active
11109961
ABSTRACT:
A power transistor structure uses metal drain and source strips with non-uniform widths to reduce variations in current density across the power transistor structure. The reductions in current density, in turn, reduce the source-to-drain turn on resistance and maximize the overall current carrying capacity of power transistor structure.
REFERENCES:
patent: 6084277 (2000-07-01), Disney et al.
patent: 6555883 (2003-04-01), Disney et al.
patent: 6728942 (2004-04-01), Lampaert et al.
patent: 6750489 (2004-06-01), Merrill
Hopper Peter J.
Lindorfer Philipp
Strachan Andy
Vashchenko Vladislav
Isaac Stanetta
Lebentritt Michael
National Semiconductor Corporation
Pickering Mark C.
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