Allocating cache lines

Details Allocating cache lines Allocating cache lines

2007-03-27

2007-03-27

Bataille, Pierre-Michel (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S141000, C711S145000, C711S156000

Reexamination Certificate

active

10335204

ABSTRACT:
Allocating cache lines includes incurring a cache write miss and, after incurring the cache write miss, writing data having a memory address to a cache line that does not include data at the memory address and that includes only invalid data.

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U.S. Appl. No. 60/400,391,filed Jul. 31, 2002, Chauvel et al.
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U.S. Appl. No. 60/400,391, Chauvel et al., Entitled “JSM Protection,” 37 pages.

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