Semiconductor integrated circuit device and method of manufactur

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257393, 257903, H01L 2976, H01L 2994, H01L 31062, H01L 31113

Patent

active

057985510

ABSTRACT:
Disclosed is a semiconductor integrated circuit device (e.g., an SRAM) having memory cells each of a flip-flop circuit constituted by a pair of drive MISFETs and a pair of load MISFETs, the MISFETs being cross-connected by a pair of local wiring lines, and having transfer MISFETs, wherein gate electrodes of all of the MISFETs are provided in a first level conductive layer, and the pair of local wiring lines are provided respectively in second and third level conductive layers. The local wiring lines can overlap and have a dielectric therebetween so as to form a capacitance element, to increase alpha particle soft error resistance. Moreover, by providing the pair of local wiring lines respectively in different levels, integration of the device can be increased. Side wall spacers can be provided on the sides of the gate electrodes of the MISFETs and on the sides of the local wiring lines, and connection holes to semiconductor regions of these MISFETs are self-aligned to both the gate electrodes and the local wiring lines, whereby capacitor area can be increased and integration of the device can also be increased.

REFERENCES:
patent: 5296729 (1994-03-01), Yamanaka et al.
patent: 5298782 (1994-03-01), Sundaresan
patent: 5523598 (1996-06-01), Watanabe et al.
patent: 5661325 (1997-08-01), Hayashi et al.
Balasubramanian et al, "Monolithic Storage Cell Having Inherent Latent Image Memory Operation", IBM Technical Disclosure Bulletin, vol. 17 No. 12 May 1975 pp. 3634-3635.

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