Ferroelectric memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S295000, C257S307000, C257SE27104

Reexamination Certificate

active

10883736

ABSTRACT:
A ferroelectric memory device includes a first bit line, a second bit line provided adjacent to the first bit line, a first memory cell block including a first terminal, a second terminal, and a plurality of memory cells connected in series between the first and second terminals and arranged in a first direction along the first bit line connected to the first terminal by a first block select transistor, a second memory cell block including a plurality of memory cells, and a plurality of first contacts arranged between the first and second memory cell blocks, each first contact connecting the upper electrode and drain or source electrode of one memory cell.

REFERENCES:
patent: 5466629 (1995-11-01), Mihara et al.
patent: 6097051 (2000-08-01), Torii et al.
patent: 2002/0031885 (2002-03-01), Takashima
patent: 10-255483 (1998-09-01), None

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