Semiconductor memory device having trench isolation regions and

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257 68, 257 71, 257303, 257306, H01L 27108, H01L 2976

Patent

active

057985448

ABSTRACT:
Disclosed herein is a semiconductor memory device including a plurality of memory cells each includes an active region which is defined in a column direction by a pair of trench isolation regions formed in a semiconductor substrate and in a row direction by an isolation gate conductor lines formed on a first gate insulating film covering the substrate, a source and a drain region selectively formed in the active region to define a channel region of a cell transistor, a second gate insulating film formed on the channel region, a word line formed on the second gate insulating film, a first insulating film covering the active region and the word line, a bit line formed on the first insulating film to overlap with the isolation gate conductor, a bit line connection conductor formed in the first insulating film to connect the drain region to the bit line with being in contact with the sidewall surface of the bit line, a second insulating film covering the bit line and the first insulating film, and a storage capacitor having a capacitor electrode connected to the source region through a contact hole provided in the first and second insulating film.

REFERENCES:
patent: 4926378 (1990-05-01), Uchida et al.
patent: 5029127 (1991-07-01), Uchida et al.
patent: 5170243 (1992-12-01), Dhong et al.
patent: 5463236 (1995-10-01), Sakao

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