Non-volatile memory device having improved programming and...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C438S266000

Reexamination Certificate

active

10974331

ABSTRACT:
A non-volatile memory device and a fabrication method thereof, wherein a charge trapping layer, which is a memory unit, is formed at opposite ends of a gate of a cell, i.e., adjacent to source and drain junction regions, such that portions of the charge trapping layer adjacent to the source and drain junction regions are formed to be thicker than other portions of the charge trapping layer. Therefore, regions adjacent to junction regions function as electron storage regions and hole filing regions.

REFERENCES:
patent: 5492846 (1996-02-01), Hara
patent: 5612237 (1997-03-01), Ahn
patent: 5768192 (1998-06-01), Eitan
patent: 6335554 (2002-01-01), Yoshikawa
patent: 2001-156188 (2001-06-01), None
patent: 2001-230332 (2001-08-01), None

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