Electrical computers and digital processing systems: memory – Address formation – Incrementing – decrementing – or shifting circuitry
Reexamination Certificate
2007-09-04
2007-09-04
Bragdon, Reginald (Department: 2189)
Electrical computers and digital processing systems: memory
Address formation
Incrementing, decrementing, or shifting circuitry
C711S217000, C711S218000, C712S024000, C712S026000
Reexamination Certificate
active
11003398
ABSTRACT:
There is disclosed a technique for accessing a register file which comprises defining a first register address as a plurality of bits and using said first register address to access said register file generating a second register address by using a sequence of said plurality of bits with at least one of said plurality of bits supplied via a unitary operator, the unitary operator being effective to selectively alter the logical value of said bit depending on its logical value in the first register address, and using said second register address to access said register file. A computer system for carrying out such a technique is also enclosed.
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International Search Report for Appl. No. PCT/GB01/02665, mailed Aug. 22, 2001, 6 pages.
Dobson Timothy Martin
Taunton Mark
Wilson Sophie
Bragdon Reginald
Broadcom Corporation
Dinh Ngoc
Sterne Kessler Goldstein & Fox PLLC
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