Extending circuit for memory and transmitting-receiving...

Details Extending circuit for memory and transmitting-receiving... Extending circuit for memory and transmitting-receiving...

2007-04-17

2007-04-17

Fleming, Fritz (Department: 2181)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output data buffering

C710S057000

Reexamination Certificate

active

10724045

ABSTRACT:
An extending circuit for memory includes an output data effective signal generator for, when a status signal from a next-stage FIFO circuit represents a data writable state, asserting a write enable signal from the next-stage FIFO circuit, and enabling data to be written into the next-stage FIFO circuit. The extending circuit for memory also includes an internal FIFO write enable generator for receiving a status signal from the next-stage FIFO circuit, asserting an internal FIFO write enable signal, and enabling data to be written into an internal FIFO circuit of the extending circuit for memory, when the next-stage FIFO circuit is in a data unwritable state.

REFERENCES:
patent: 4463443 (1984-07-01), Frankel et al.
patent: 5809521 (1998-09-01), Steinmetz et al.
patent: 5956492 (1999-09-01), Jander et al.
patent: 5982772 (1999-11-01), Oskouy
patent: 6055285 (2000-04-01), Alston
patent: 6226698 (2001-05-01), Yeung et al.
patent: 5-20864 (1993-01-01), None

Affiliated with

Also associated with

Rating

Extending circuit for memory and transmitting-receiving... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Extending circuit for memory and transmitting-receiving..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Extending circuit for memory and transmitting-receiving... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3757342