Open digit line array architecture for a memory array

Details Open digit line array architecture for a memory array Open digit line array architecture for a memory array

2007-03-20

2007-03-20

Ho, Hoai V. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

C365S210130, C365S230030

Reexamination Certificate

active

11500786

ABSTRACT:
A system and method for sensing a data state stored by a memory cell that includes coupling a first digit line and a second digit line to a precharge voltage and further coupling a memory cell to the first digit line. At least one digit line other than the first and second digit lines is driven to a reference voltage level and the at least one digit line is coupled to the second digit line to establish a reference voltage in the second digit line. A voltage differential is sensed between the first digit line and the second digit line, and a data state based on the voltage differential is latched in response.

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