Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-09-04
2007-09-04
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
11082699
ABSTRACT:
A system and method for implementing a verification system. Included is a first set of verification engines for attempting to solve a verification problem. At least one of the first set of verification engines divides the verification problem into a set of partitions and passes at least one of the set of partitions to a second set of verification engines. Each one of the set of partitions may be passed to a distinctly separate verification engine. A system framework is configured to communicate with an application program and further configured to instantiate at least one verification engine in a user-defined sequence. Included within at least one of the first set of verification engines is a means for communicating verification information to the second set of verification engines.
REFERENCES:
patent: 5528508 (1996-06-01), Russell et al.
patent: 6698003 (2004-02-01), Baumgartner et al.
Baumgartner et al., “Scalable Automated Verification via Expert-System Guided Transformations”, Article, 2004, vol./Issue Unknown Springer-Verlag Berlin Heidelberg.
Mony et al., “Method and System for Engine-Controlled Case Splitting within a Multiple-Engine Based Verification Framework”, IBM Confidential Document, Aug. 2004.
Baumgartner Jason Raymond
Kanzelman Robert Lowell
Mony Hari
Paruthi Viresh
Dillon & Yudell LLP
Do Thuan
International Business Machines - Corporation
Salys Casimer K.
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