Method for fabricating semiconductor device with gate spacer

Details Method for fabricating semiconductor device with gate spacer Method for fabricating semiconductor device with gate spacer

2007-09-04

2007-09-04

Dang, Trung (Department: 2823)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S734000, C438S738000, C257SE21252

Reexamination Certificate

active

11019745

ABSTRACT:
The present invention relates to a method for fabricating a semiconductor device with gate spacers. The method includes the steps of: forming a plurality of gate structures on a substrate; forming an insulation layer on the gate structures and the substrate; and etching the insulation layer to form gate spacers on sidewalls of the gate structures, wherein the gate spacers have top corners sloped by employing two different etch recipes providing different ranges of a pressure and a gas flow.

REFERENCES:
patent: 6153483 (2000-11-01), Yeh et al.
patent: 6225203 (2001-05-01), Liu et al.
patent: 6346725 (2002-02-01), Ma et al.
patent: 6573133 (2003-06-01), Roy et al.
patent: 6794303 (2004-09-01), Haselden et al.
patent: 6977184 (2005-12-01), Chou et al.
patent: 2003-0012106 (2003-02-01), None

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