Semiconductor integrated circuit device with filter circuit

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction

Reexamination Certificate

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Details

C326S024000, C326S027000, C326S098000

Reexamination Certificate

active

10865923

ABSTRACT:
There is provided a semiconductor integrated circuit device with a filer circuit serving for eliminating a glitch contained in a logic signal supplied to the device, wherein the filter circuit includes: a first delay circuit activated within a certain period after each rising edge timing of input logic signals to delay the rising edge; a second delay circuit activated within a certain period after each falling edge timing of the input logic signals to delay the falling edge; and an output driver controlled by outputs of the first and second delay circuits to output delayed logic signals to an output node in response to the input logic signals.

REFERENCES:
patent: 5910730 (1999-06-01), Sigal
patent: 6044017 (2000-03-01), Lee et al.
patent: 6366115 (2002-04-01), DiTommaso
patent: 6590421 (2003-07-01), Chung et al.
patent: 6750677 (2004-06-01), Sumita
patent: 6803792 (2004-10-01), Yasuda et al.
patent: 6860578 (2005-03-01), Yamada et al.
patent: 6882171 (2005-04-01), Ong
patent: 08-070242 (1996-03-01), None

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